Instructor:
Ishan Ghanshyambhai Thakkar
699
Credits:
3.0
002
Building:
F Paul Anderson Tower
Room:
Rm.253
Semester:
Spring 2025
Start Date:
End Date:
Name:
Tops In Ee: Hrdwre Acc For Mchne Lrng
Requisites:
Prereq: Consent of instructor.
Class Type:
LEC
3:00 pm
4:15 pm
Days:
MW
Note:
This course will provide fundamental knowledge on various topics related to the design of hardware accelerator architectures for the prevalent machine learning algorithms such as DNNs and GNNs. The course will start with describing various popular DNN models (e.g., CNNs, RNNs, Transformers) and GNN models (e.g., GCN, GIN, GAN, GraphSage) with the aim to identify the computational requirements (e.g., sparse or dense basic linear algebra subgroups (BLAS), tensor algebra) of these models. Then, the course will delve into hardware-software design techniques for realizing accelerator architectures that can fulfill these computational requirements in a high-performance and energy-efficient manner. The discussed hardware design techniques will include the implementation of the basic spatial accelerator substrates using various architectures and technologies. The discussed architectures and technologies will include conventional Systolic Arrays, chiplet based architectures, as well as architectures based on emerging paradigms such as MCC (DRAM, SRAM, RRAM, PCRAM-based MCC) and OC (analog, digital). Moreover, techniques and technologies for designing interconnection networks for spatial accelerator substrates will also be discussed. On the other hand, the discussed software techniques will include the exploration of various dataflows and the transformation of loop nests. Emphasis will be given to explaining various design choices and tradeoffs. The course will provide learning opportunities through regular in-class quizzes, reading assignments, project(s), and in-class student presentations
A detailed study of a topics of current interest in electrical engineering. May be repeated to a maximum of six credits, but only three credits may be earned under the same subtitle. A particular topic may be offered at most twice under the EE 699 number.
A detailed study of a topics of current interest in electrical engineering. May be repeated to a maximum of six credits, but only three credits may be earned under the same subtitle. A particular topic may be offered at most twice under the EE 699 number.
EE