Instructor:
Joseph A Elias
584
Credits:
3.0
001
Building:
F Paul Anderson Tower
Room:
Rm.253
Semester:
Fall 2022
Start Date:
End Date:
Name:
Introduction Of Vlsi Design And Testing
Requisites:
Prereq: Engineering standing or consent of instructor.
Class Type:
LEC
11:00 am
11:50 am
Days:
MWF
Introduction to the design and layout of Very Large Scale Integrated (VLSI) Circuits for complex digital systems; fundamentals of the VLSI fabrication process; and introduction to VLSI testing and structured design for testability techniques.
Introduction to the design and layout of Very Large Scale Integrated (VLSI) Circuits for complex digital systems; fundamentals of the VLSI fabrication process; and introduction to VLSI testing and structured design for testability techniques.
EE